MCIMX6Q6AVT10AD NXP

MCIMX6Q6AVT10AD   NXP
MCIMX6Q6AVT10AD   NXP
MCIMX6Q6AVT10AD   NXP
MCIMX6Q6AVT10AD   NXP

MCIMX6Q6AVT10AD NXP

Available
MCIMX6Q6AVT10AD   NXP


The i.MX 6Dual/6Quad processors are based on Arm Cortex-A9 MPCore platform, which has the following features:
• Arm Cortex-A9 MPCore 4xCPU processor (with TrustZone®)
• The core configuration is symmetric, where each core includes:
— 32 KByte L1 Instruction Cache
— 32 KByte L1 Data Cache
— Private Timer and Watchdog
— Cortex-A9 NEON MPE (Media Processing Engine) Co-processor
The Arm Cortex-A9 MPCore complex includes:
• General Interrupt Controller (GIC) with 128 interrupt support
• Global Timer
• Snoop Control Unit (SCU)
• 1 MB unified I/D L2 cache, shared by two/four cores
• Two Master AXI (64-bit) bus interfaces output of L2 cache

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