• Single-core Arm Cortex-A7
—The single core A7 provides a cost-effective and power-efficient solution.
• Multilevel memory system
—The multilevel memory system of processor is based on the L1 instruction and data caches, L2 cache, and internal and external memory. The processor supports many types of external memory devices, including DDR3, low voltage DDR3, LPDDR2, NOR Flash, NAND Flash (MLC and SLC), OneNAND™, Quad SPI, and managed NAND, including eMMC up to rev 4.4/4.41/4.5.
• Smart speed technology
—Power management implemented throughout the IC that enables multimedia features and peripherals to consume minimum power in both active and various low power modes.
• Dynamic voltage and frequency scaling
—The power efficiency of devices by scaling the voltage and frequency to optimize performance.
• Multimedia powerhouse
—The multimedia performance of processor is enhanced by a multilevel cache system, NEON™ MPE (Media Processor Engine) co-processor, a programmable smart DMA (SDMA) controller, an asynchronous audio sample rate converter, an Electrophoretic Display (EPD) controller, and a Pixel processing pipeline (PXP) to support 2D image processing, including color-space conversion, scaling, alpha-blending, and rotation.
• 2x Ethernet interfaces
—2x 10/100 Mbps Ethernet controllers.
• Human-machine interface
—Each processor supports one digital parallel display interface.
• Interface flexibility
—Each processor supports connections to a variety of interfaces: two high-speed USB on-the-go with PHY, multiple expansion card ports (high-speed MMC/SDIO host and other), two 12-bit ADC modules with up to 10 total input channels and two CAN ports.
• Advanced security
—The processors deliver hardware-enabled security features that enable secure e-commerce, digital rights management (DRM), information encryption, secure boot, AES-128 encryption, SHA-1, SHA-256 HW acceleration engine, and secure software downloads. The security features are discussed in the i.MX 6ULL Security Reference Manual (IMX6ULLSRM).
• Integrated power management—The processors integrate linear regulators and internally generate voltage levels for different domains. This significantly simplifies system power management structure

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