R5F1096CKSP#X0 RENESAS
Available
R5F1096CKSP#X0 RENESAS
Minimum instruction execution time can be changed from high speed (0.03125 μs: @ 32 MHz operation with highspeed on-chip oscillator) to ultra low-speed (30.5 μs: @ 32.768 kHz operation with subsystem clock) General-purpose register: 8 bits × 32 registers (8 bits × 8 registers × 4 banks) ROM: 8 to 64 KB, RAM: 0.5 to 4 KB, Data flash memory: 4 KB High-speed on-chip oscillator • Select from 32 MHz (TYP.), 24 MHz (TYP.), 16 MHz (TYP.), 12 MHz (TYP.), 8 MHz (TYP.), 4 MHz (TYP.), and 1 MHz (TYP.) On-chip single-power-supply flash memory (with prohibition of block erase/writing function) Self-programming (with boot swap function/flash shield window function) On-chip debug function On-chip power-on-reset (POR) circuit and voltage detector (LVD) On-chip watchdog timer (operable with the dedicated internal low-speed on-chip oscillator) On-chip multiplier and divider/multiply-accumulator • 16 bits × 16 bits = 32 bits (Unsigned or signed) • 32 bits ÷ 32 bits = 32 bits (Unsigned) • 16 bits × 16 bits + 32 bits = 32 bits (Unsigned or signed) On-chip key interrupt function On-chip clock output/buzzer output controller On-chip BCD adjustment I/O ports: 16 to 44 (N-ch open drain: 0 to 4) Timer • 16-bit timer: 8 channels • Watchdog timer: 1 channel • Real-time clock: 1 channel • Interval timer: 1 channel • Wakeup timer: 1 channel Serial interface • CSI: 0 to 8 channels • UART/UART (LIN-bus supported): 1 to 5 channels • I2 C/Simplified I2 C communication: 0 to 7 channels 8/10-bit resolution A/D converter (VDD = 1.8 to 5.5 V): 4 to 12 channels Power supply voltage: VDD = 1.8 to 5.5 V (J version), VDD = 2.7 to 5.5 V (K version) Operating ambient temperature: TA = −40 to +85°C (J version), TA = −40 to +125°C (K version)
Minimum instruction execution time can be changed from high speed (0.03125 μs: @ 32 MHz operation with highspeed on-chip oscillator) to ultra low-speed (30.5 μs: @ 32.768 kHz operation with subsystem clock) General-purpose register: 8 bits × 32 registers (8 bits × 8 registers × 4 banks) ROM: 8 to 64 KB, RAM: 0.5 to 4 KB, Data flash memory: 4 KB High-speed on-chip oscillator • Select from 32 MHz (TYP.), 24 MHz (TYP.), 16 MHz (TYP.), 12 MHz (TYP.), 8 MHz (TYP.), 4 MHz (TYP.), and 1 MHz (TYP.) On-chip single-power-supply flash memory (with prohibition of block erase/writing function) Self-programming (with boot swap function/flash shield window function) On-chip debug function On-chip power-on-reset (POR) circuit and voltage detector (LVD) On-chip watchdog timer (operable with the dedicated internal low-speed on-chip oscillator) On-chip multiplier and divider/multiply-accumulator • 16 bits × 16 bits = 32 bits (Unsigned or signed) • 32 bits ÷ 32 bits = 32 bits (Unsigned) • 16 bits × 16 bits + 32 bits = 32 bits (Unsigned or signed) On-chip key interrupt function On-chip clock output/buzzer output controller On-chip BCD adjustment I/O ports: 16 to 44 (N-ch open drain: 0 to 4) Timer • 16-bit timer: 8 channels • Watchdog timer: 1 channel • Real-time clock: 1 channel • Interval timer: 1 channel • Wakeup timer: 1 channel Serial interface • CSI: 0 to 8 channels • UART/UART (LIN-bus supported): 1 to 5 channels • I2 C/Simplified I2 C communication: 0 to 7 channels 8/10-bit resolution A/D converter (VDD = 1.8 to 5.5 V): 4 to 12 channels Power supply voltage: VDD = 1.8 to 5.5 V (J version), VDD = 2.7 to 5.5 V (K version) Operating ambient temperature: TA = −40 to +85°C (J version), TA = −40 to +125°C (K version)
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